In general, a lithographic manufacturing process according to one embodiment of the invention comprises: providing a first lithographic projection apparatus comprising a projection system for projecting a patterned beam onto a target portion of a substrate, providing a substrate that is at least partially covered by a layer of radiation-sensitive material, providing a projection beam of radiation using a radiation system, using patterning structure to endow the projection beam with a pattern in its cross-section, projecting the patterned beam of radiation onto a target portion of the layer using the projection system to obtain a projected image, and providing a second lithographic projection apparatus for reference.
The term “patterning structure” as here employed should be broadly interpreted as referring to means that can be used to endow an incoming radiation beam with a patterned cross-section, corresponding to a pattern that is to be created in a target portion of the substrate; the term “light valve” can also be used in this context. Generally, the said pattern will correspond to a particular functional layer in a device being created in the target portion, such as an integrated circuit or other device (see below). Examples of such patterning structure include:                A mask. The concept of a mask is well known in lithography, and it includes mask types such as binary, alternating phase-shift, and attenuated phase-shift, as well as various hybrid mask types. Placement of such a mask in the radiation beam causes selective transmission (in the case of a transmissive mask) or reflection (in the case of a reflective mask) of the radiation impinging on the mask, according to the pattern on the mask. In the case of a mask, the support structure will generally be a mask table, which ensures that the mask can be held at a desired position in the incoming radiation beam, and that it can be moved relative to the beam if so desired.        A programmable mirror array. One example of such a device is a matrix-addressable surface having a viscoelastic control layer and a reflective surface. The basic principle behind such an apparatus is that (for example) addressed areas of the reflective surface reflect incident light as diffracted light, whereas unaddressed areas reflect incident light as undiffracted light. Using an appropriate filter, the said undiffracted light can be filtered out of the reflected beam, leaving only the diffracted light behind; in this manner, the beam becomes patterned according to the addressing pattern of the matrix-adressable surface. An alternative embodiment of a programmable mirror array employs a matrix arrangement of tiny mirrors, each of which can be individually tilted about an axis by applying a suitable localized electric field, or by employing piezoelectric actuation means. Once again, the mirrors are matrix-addressable, such that addressed mirrors will reflect an incoming radiation beam in a different direction to unaddressed mirrors; in this manner, the reflected beam is patterned according to the addressing pattern of the matrix-adressable mirrors. The required matrix addressing can be performed using suitable electronic means. In both of the situations described hereabove, the patterning structure can comprise one or more programmable mirror arrays. More information on mirror arrays as here referred to can be gleaned, for example, from U.S. Pat. No. 5,296,891 and U.S. Pat. No. 5,523,193, and PCT patent applications WO 98/38597 and WO 98/33096, which are incorporated herein by reference. In the case of a programmable mirror array, the said support structure may be embodied as a frame or table, for example, which may be fixed or movable as required.        A programmable LCD array. An example of such a construction is given in U.S. Pat. No. 5,229,872, which is incorporated herein by reference. As above, the support structure in this case may be embodied as a frame or table, for example, which may be fixed or movable as required.For purposes of simplicity, the rest of this text may, at certain locations, specifically direct itself to examples involving a mask and mask table; however, the general principles discussed in such instances should be seen in the broader context of the patterning structure as hereabove set forth.        
Lithographic projection apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In such a case, the patterning structure may generate a circuit pattern corresponding to an individual layer of the IC, and this pattern can be imaged onto a target portion (e.g. comprising one or more dies) on a substrate (silicon wafer) that has been coated with a layer of radiation-sensitive material (resist). In general, a single wafer will contain a whole network of adjacent target portions that are successively irradiated via the projection system, one at a time. In current apparatus, employing patterning by a mask on a mask table, a distinction can be made between two different types of machine. In one type of lithographic projection apparatus, each target portion is irradiated by exposing the entire mask pattern onto the target portion at one time; such an apparatus is commonly referred to as a wafer stepper. In an alternative apparatus—commonly referred to as a step-and-scan apparatus—each target portion is irradiated by progressively scanning the mask pattern under the projection beam in a given reference direction (the “scanning” direction) while synchronously scanning the substrate table parallel or anti-parallel to this direction; since, in general, the projection system will have a magnification factor M (generally <1), the speed V at which the substrate table is scanned will be a factor M times that at which the mask table is scanned. More information with regard to lithographic devices as here described can be gleaned, for example, from U.S. Pat. No. 6,046,792, incorporated herein by reference.
In a manufacturing process using a lithographic projection apparatus, a pattern (e.g. in a mask) is imaged onto a substrate that is at least partially covered by a layer of radiation-sensitive material (resist). Prior to this imaging step, the substrate may undergo various procedures, such as priming, resist coating and a soft bake. After exposure, the substrate may be subjected to other procedures, such as a post-exposure bake (PEB), development, a hard bake and measurement/inspection of the imaged features. This array of procedures is used as a basis to pattern an individual layer of a device, e.g. an IC. Such a patterned layer may then undergo various processes such as etching, ion-implantation (doping), metallization, oxidation, chemo-mechanical polishing, etc., all intended to finish off an individual layer. If several layers are required, then the whole procedure, or a variant thereof, will have to be repeated for each new layer. Eventually, an array of devices will be present on the substrate (wafer). These devices are then separated from one another by a technique such as dicing or sawing, whence the individual devices can be mounted on a carrier, connected to pins, etc. Further information regarding such processes can be obtained, for example, from the book “Microchip Fabrication: A Practical Guide to Semiconductor Processing”, Third Edition, by Peter van Zant, McGraw Hill Publishing Co., 1997, ISBN 0-07-067250-4, incorporated herein by reference.
For the sake of simplicity, the projection system may hereinafter be referred to as the “lens”; however, this term should be broadly interpreted as encompassing various types of projection system, including refractive optics, reflective optics, and catadioptric systems, for example. The radiation system may also include components operating according to any of these design types for directing, shaping or controlling the projection beam of radiation, and such components may also be referred to below, collectively or singularly, as a “lens”. Further, the lithographic apparatus may be of a type having two or more substrate tables (and/or two or more mask tables). In such “multiple stage” devices the additional tables may be used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposures. Dual stage lithographic apparatus are described, for example, in U.S. Pat. No. 5,969,441 and PCT Patent Application No. WO 98/40791, incorporated herein by reference.
A circuit pattern corresponding to an individual layer of an IC generally comprises a plurality of device patterns and interconnecting lines. Device patterns may comprise structures of different spatial arrangement such as, for example, line-space patterns (“bar patterns”), capacitor and/or bit line contacts, DRAM isolation patterns, and twin-hole patterns. Any such structure (of different spatial arrangement) is referred to hereinafter as a “feature”. Fabrication of a circuit pattern involves the control of space tolerances between devices and interconnecting lines, between features, and between elements of a feature. In particular the control of space tolerance of the smallest space between two lines permitted in the fabrication of the device and/or of the smallest width of a line is of importance. Said smallest space and/or smallest width is referred to as the critical dimension (“CD”). A feature may comprise elements (such as, for example, bars) arranged in a spatially periodic manner. The length of the period associated with said spatially periodic arrangement is referred to hereinafter as the “pitch”. Hence, it is possible to identify a pitch or a (limited) range of pitches for such a (periodic) feature; accordingly, in this specification reference may be made to the pitch of a feature. Generally, a distinction is made between “dense” features and “isolated” features. In the context of the present invention, a dense feature is a feature where the width of a feature element is of the order of the CD, and where the pitch is of the order of two to six times the CD. Similarly, an isolated feature is a feature comprising elements of a width of the order of the CD, and where the pitch is of the order of 6 or more times the CD. Besides circuit patterns, a feature in the context of at least one embodiment of the present invention may also relate to a test pattern for controlling a lithographic process step.
In lithography, a method known as CD-proximity matching is used to address a phenomenon known as the optical proximity effect. This effect is caused by the inherent difference in diffraction pattern for isolated features as compared to dense features. Generally, the optical proximity effect leads to a difference in critical dimension (CD) when dense and more isolated features are printed at the same time. A pitch dependence of CD will be referred to hereinafter as “CD-pitch anomaly”. In the presence of CD-pitch anomaly the printed CD depends on the pitch (the inverse of the spatial frequency) at which elements of the dimension of the CD are arranged in a feature.
CD-pitch anomaly also depends on the illumination setting used. An “illumination setting” or an “illumination mode” in the context of the present invention should be interpreted throughout this specification and in the claims to comprise a setting of a preselected radiation intensity distribution in a pupil plane of the radiation system. Originally, so-called conventional illumination modes have been used which have a disc-like intensity distribution of the illumination radiation at the pupil of the radiation system. With the trend to imaging smaller features, the use of illumination settings providing annular or multi-pole intensity distributions in the pupil of the radiation system have become standard in order to improve the process window, i.e. exposure and focus latitude, for small features. However, CD-pitch anomaly becomes worse for off-axis illumination modes, such as annular illumination.
One solution to alleviate the occurrence of CD-pitch anomaly has been to apply Optical Proximity Correction (referred to hereinafter as “OPC”) by biasing the different features on the reticle. For example, according to one form of biasing, the features are biased by making the lines of more isolated features on the reticle somewhat thicker so that, in the image on the substrate, they are printed with the same transverse dimension as the lines of dense features. In another form of biasing, an end correction is applied so that the lines of isolated or dense features are printed with the correct length. However, at smaller pitches and with off-axis illumination, the variation of the CD as a function of pitch is more pronounced and more non-linearly related to pitch than at larger pitches; consequently, more line biasing has to be applied at smaller pitches and the biasing becomes more complicated. OPC is discussed, for example, in SPIE Vol. 4000, pages 1015 to 1023, “Automatic parallel optical proximity correction and verification system”, Watanabe et al. As will be appreciated, advanced software algorithms and very complex mask making is required for OPC. This has significantly increased costs of masks. Generally, in a high volume manufacturing site, different lithographic projection apparatus are to be used for a lithographic manufacturing process step involving OPC. In such a situation, matching of different lithographic projection apparatus such as to reduce CD variations is normally done for one selected feature type (for example, a dense or an isolated feature) by an adjustment of exposure energy at each of said different lithographic projection apparatus save the apparatus used for reference. Such a matching of lithographic apparatus is described, for example, in C. Lee et al., “Reducing CD variation via statistically matching steppers”, Proceedings of the SPIE, Vol. 1261, 63–70 (1990) and in U.S. Pat. No. 5,586,059, incorporated herein by reference. Since the matching of printed CD is substantially effectuated for one selected feature type, there is the problem that the matching of CD for features with pitches other than the pitch of the feature selected for matching can be rather poor or even out of tolerance.